( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources.

, , , , , , , и . CoRR, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Antonios Kanellopoulos

Yiannis Kanellopoulos

Charalambos Konstantin Kanellopoulos

Adriani Ruth Friederike Kanellopoulos

Konstantinos Paraschakis

 

Другие публикации лиц с тем же именем

MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations., , , , , , , и . ACM Trans. Archit. Code Optim., 19 (2): 26:1-26:29 (2022)Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources., , , , , , , и . MICRO, стр. 1178-1195. ACM, (2023)ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems., , , , , , , , , и . IEEE Trans. Emerg. Top. Comput., 11 (2): 388-403 (апреля 2023)Virtuoso: An Open-Source, Comprehensive and Modular Simulation Framework for Virtual Memory Research., , и . CoRR, (2024)Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources., , , , , , , и . CoRR, (2023)SeGraM: a universal hardware accelerator for genomic sequence-to-graph and sequence-to-sequence mapping., , , , , , , , , и 8 other автор(ы). ISCA, стр. 638-655. ACM, (2022)EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM., , , , , , и . MICRO, стр. 166-181. ACM, (2019)The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework., , , , , , , , , и . ISCA, стр. 1050-1063. IEEE, (2020)SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations., , , , , , , , и . MICRO, стр. 600-614. ACM, (2019)PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques., , , , , , и . ISVLSI, стр. 267-272. IEEE, (2022)