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Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation.

S. Srinivasa, A. Ramanathan, J. Sundaram, D. Kurian, S. Gopal, N. Jain, A. Srinivasan, R. Iyer, V. Narayanan, and T. Karnik. ISQED, page 547-552. IEEE, (2021)

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P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

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Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications.K. Ma, X. Li, S. Li, Y. Liu, J. Sampson, Y. Xie, and V. Narayanan. IEEE Micro, 35 (5): 32-40 (2015)FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge.W. Tang, M. Lee, J. Wu, Y. Xu, Y. Yu, Y. Liu, K. Ni, Y. Wang, H. Yang, V. Narayanan and 1 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 70 (6): 2398-2411 (2023)Width minimization in the Single-Electron Transistor array synthesis.C. Liu, C. Chiang, C. Huang, C. Wang, Y. Chen, S. Datta, and V. Narayanan. DATE, page 1-4. European Design and Automation Association, (2014)A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.S. Srinivasa, A. Ramanathan, X. Li, W. Chen, F. Hsueh, C. Yang, C. Shen, J. Shieh, S. Gupta, M. Chang and 3 other author(s). ISLPED, page 34:1-34:6. ACM, (2018)Noise Aware Power Adaptive Partitioned Deep Networks for Mobile Visual Assist Platforms.P. Zientara, J. Sampson, and V. Narayanan. SoCC, page 186-191. IEEE, (2018)Using complete system simulation to characterize SPECjvm98 benchmarks.T. Li, L. John, N. Vijaykrishnan, A. Sivasubramaniam, J. Sabarinathan, and A. Murthy. ICS, page 22-33. ACM, (2000)A task-oriented vision system.Y. Xiao, K. Irick, J. Sampson, V. Narayanan, and C. Zhang. ACM Great Lakes Symposium on VLSI, page 181-186. ACM, (2014)A comparative study of power efficient SRAM designs.J. Hezavei, N. Vijaykrishnan, and M. Irwin. ACM Great Lakes Symposium on VLSI, page 117-122. ACM, (2000)A clock power model to evaluate impact of architectural and technology optimizations.D. Duarte, N. Vijaykrishnan, and M. Irwin. IEEE Trans. Very Large Scale Integr. Syst., 10 (6): 844-855 (2002)Managing Leakage Energy in Cache Hierarchies.L. Li, I. Kadayif, Y. Tsai, N. Vijaykrishnan, M. Kandemir, M. Irwin, and A. Sivasubramaniam. J. Instruction-Level Parallelism, (2003)

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Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation.

Please choose a person to relate this publication to

P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Narayanan, Vijaykrishnan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation.

Please choose a person to relate this publication to

P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation.