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F5: Frequency generation and clock distribution., , , , , , , and . ISSCC, page 508-509. IEEE, (2013)High-frequency DC-DC conversion : fact or fiction., , , , and . ISCAS, IEEE, (2006)3DICs for tera-scale computing: a case study., , and . ISPD, page 77-78. ACM, (2011)Logic soft errors in sub-65nm technologies design and CAD challenges., , , and . DAC, page 2-4. ACM, (2005)Microprocessor system applications and challenges for through-silicon-via-based three-dimensional integration., , and . IET Comput. Digit. Tech., 5 (3): 205-212 (2011)CPU Microarchitectural Performance Analysis of SVT-AV1 Encoder., , , and . ICIP, page 3045-3049. IEEE, (2023)A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding., , , , , , , , and . DATE, page 1400-1403. IEEE, (2021)Innovations for Intelligent Edge., , , , and . ESSCIRC, page 41-44. IEEE, (2022)Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power., , , and . ISLPED, page 156-161. ACM, (2006)HiSIM: hierarchical interconnect-centric circuit simulator., , and . ICCAD, page 489-496. IEEE Computer Society / ACM, (2004)