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Disambiguation of "Srinivasan, Krishnan"

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Layout aware design of mesh based NoC architectures.

, and . CODES+ISSS, page 136-141. ACM, (2006)

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Krishnan Sircar

Ajay Krishnan

Venkata Krishnan

Ajay Krishnan

R Srinivasan

 

Other publications of authors with the same name

System-Level Design Techniques for Throughput and Power Optimization of Multiprocessor SoC Architectures., , , and . ISVLSI, page 39-45. IEEE Computer Society, (2004)Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures., , and . ICCD, page 422-429. IEEE Computer Society, (2004)Open X-Embodiment: Robotic Learning Datasets and RT-X Models : Open X-Embodiment Collaboration., , , , , , , , , and 269 other author(s). ICRA, page 6892-6903. IEEE, (2024)Layout aware design of mesh based NoC architectures., and . CODES+ISSS, page 136-141. ACM, (2006)SAGA: synthesis technique for guaranteed throughput NoC architectures., and . ASP-DAC, page 489-494. ACM Press, (2005)A low complexity heuristic for design of custom network-on-chip architectures., and . DATE, page 130-135. European Design and Automation Association, Leuven, Belgium, (2006)Making Sense of Vision and Touch: Self-Supervised Learning of Multimodal Representations for Contact-Rich Tasks., , , , , , , and . ICRA, page 8943-8950. IEEE, (2019)An automated technique for topology and route generation of application specific on-chip interconnection networks., , and . ICCAD, page 231-237. IEEE Computer Society, (2005)Recovery RL: Safe Reinforcement Learning With Learned Recovery Zones., , , , , , , , , and . IEEE Robotics Autom. Lett., 6 (3): 4915-4922 (2021)A technique for low energy mapping and routing in network-on-chip architectures., and . ISLPED, page 387-392. ACM, (2005)