( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
An Energy-Efficient Last-Level Cache Architecture for Process Variation-Tolerant 3D Microprocessors.

, , и . IEEE Trans. Computers, 64 (9): 2460-2475 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Sung-Woo Son

Sung-Woo Im

Sung-myong Woo

Woo-Hyun Chung

Sung-Woo Hong

 

Другие публикации лиц с тем же именем

A Split L2 Data Cache for Scalable Cc-numa Multiprocessors., , и . Journal of Circuits, Systems, and Computers, 14 (3): 605-618 (2005)Is the Complicated ECC Array Necessary for Data Caches?, , , и . CDES, стр. 137-139. CSREA Press, (2007)Performance and cache access time of SRAM-eDRAM hybrid caches considering wire delay., , и . ISQED, стр. 524-530. IEEE, (2013)An energy-efficient task scheduler for mobile web browsing., , и . ICCE, стр. 188-189. IEEE, (2017)Architecture/OS Support for Embedded Multi-core Systems., , и . Comput. J., 53 (8): 1134-1135 (2010)A High-Performance Processing-in-Memory Accelerator for Inline Data Deduplication., , , , и . ICCD, стр. 515-523. IEEE, (2019)A Survey on Recent OS-Level Energy Management Techniques for Mobile Processing Units., , и . IEEE Trans. Parallel Distributed Syst., 29 (10): 2388-2401 (2018)An Energy-Efficient Last-Level Cache Architecture for Process Variation-Tolerant 3D Microprocessors., , и . IEEE Trans. Computers, 64 (9): 2460-2475 (2015)Correction to: Aggressive GPU cache bypassing with monolithic 3D-based NoC., , и . J. Supercomput., 79 (6): 7061 (апреля 2023)Energy-Effective Instruction Fetch Unit for Embedded Processors., , , , , и . CCNC, стр. 734-735. IEEE, (2008)