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Disambiguation of "Park, Juhyun"

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Si–Mn/Reduced Graphene Oxide Nanocomposite Anodes with Enhanced Capacity and Stability for Lithium-Ion Batteries

, , , , , , , and . ACS Applied Materials & Interfaces, 6 (3): 1702-1708 (2014)PMID: 24443772.
DOI: 10.1021/am404608d

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Sungjune Park

Jinhyung Park

Kwan Park

Shinja Park

June Park

 

Other publications of authors with the same name

Si–Mn/Reduced Graphene Oxide Nanocomposite Anodes with Enhanced Capacity and Stability for Lithium-Ion Batteries, , , , , , , and . ACS Applied Materials & Interfaces, 6 (3): 1702-1708 (2014)PMID: 24443772.Shape Analysis of Euclidean Curves under Frenet-Serret Framework., , and . ICCV, page 4004-4013. IEEE, (2023)High-Order Tensor Regularization With Application to Attribute Ranking., , and . CVPR, page 4349-4357. Computer Vision Foundation / IEEE Computer Society, (2018)Power-Gated 9T SRAM Cell for Low-Energy Operation., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 1183-1187 (2017)pMOS Pass Gate Local Bitline SRAM Architecture With Virtual $V_SS$ for Near-Threshold Operation., , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (4): 1079-1083 (2020)Structural components in functional data., , and . Comput. Stat. Data Anal., 53 (9): 3452-3465 (2009)The Frenet-Serret Framework for Aligning Geometric Curves., and . GSI, volume 11712 of Lecture Notes in Computer Science, page 608-617. Springer, (2019)Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (11): 1059-1063 (2016)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1567-1571 (2022)