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Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.

Y. Shao, J. Clemons, R. Venkatesan, B. Zimmer, M. Fojtik, N. Jiang, B. Keller, A. Klinefelter, N. Pinckney, P. Raina, S. Tell, Y. Zhang, W. Dally, J. Emer, C. Gray, B. Khailany, and S. Keckler. MICRO, page 14-27. ACM, (2019)

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Rolf-Walter Briant

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Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM.B. Zimmer, O. Thomas, S. Toh, T. Vincent, K. Asanovic, and B. Nikolic. ESSDERC, page 98-101. IEEE, (2014)Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.Y. Shao, J. Clemons, R. Venkatesan, B. Zimmer, M. Fojtik, N. Jiang, B. Keller, A. Klinefelter, N. Pinckney, P. Raina and 7 other author(s). MICRO, page 14-27. ACM, (2019)Resilient Design Techniques for Improving Cache Energy Efficiency.B. Zimmer. University of California, Berkeley, USA, (2015)AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies.H. Chen, W. Turner, S. Song, K. Zhu, G. Kokai, B. Zimmer, C. Gray, B. Khailany, D. Pan, and H. Ren. ISPD, page 175-183. ACM, (2022)6.6 Reference-Noise Compensation Scheme for Single-Ended Package-to-Package Links.X. Chen, N. Nedovic, S. Tell, S. Kudva, B. Zimmer, T. Greer, J. Poulton, S. Song, W. Turner, J. Wilson and 1 other author(s). ISSCC, page 126-128. IEEE, (2020)On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC.M. Cochet, A. Puggelli, B. Keller, B. Zimmer, M. Blagojevic, S. Clerc, P. Roche, J. Autran, and B. Nikolic. A-SSCC, page 125-128. IEEE, (2016)A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm.B. Zimmer, R. Venkatesan, Y. Shao, J. Clemons, M. Fojtik, N. Jiang, B. Keller, A. Klinefelter, N. Pinckney, P. Raina and 7 other author(s). IEEE J. Solid State Circuits, 55 (4): 920-932 (2020)A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET.M. Fojtik, B. Keller, A. Klinefelter, N. Pinckney, S. Tell, B. Zimmer, T. Raja, K. Zhou, W. Dally, and B. Khailany. ASYNC, page 27-35. IEEE, (2019)Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET.X. Chen, S. Song, J. Poulton, N. Nedovic, B. Zimmer, S. Tell, and C. Gray. CICC, page 1-4. IEEE, (2019)A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation.M. Sinangil, J. Poulton, M. Fojtik, T. Greer, S. Tell, A. Gotterba, J. Wang, J. Golbus, B. Zimmer, W. Dally and 1 other author(s). IEEE J. Solid State Circuits, 51 (2): 557-567 (2016)

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Disambiguation of "Zimmer, Brian"

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Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.

Please choose a person to relate this publication to

Rolf-Walter Briant

Benoît Briand

Ursula Brian

Annette Brians

Brian Alexander

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zimmer, Brian"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.

Please choose a person to relate this publication to

Rolf-Walter Briant

Benoît Briand

Ursula Brian

Annette Brians

Brian Alexander

Other publications of authors with the same name

Disambiguation

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URL
DOI
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Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.