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Address Code Optimization Exploiting Code Scheduling in DSP Applications., и . ISCAS, стр. 1573-1576. IEEE, (2007)TACO: A scalable framework for timing analysis and code optimization of synchronous programs., , и . RTCSA, стр. 1-8. IEEE Computer Society, (2014)Optimization of Node-clustering-based DAG partition targeting NVDLA Architecture., , , , , , и . ASICON, стр. 1-4. IEEE, (2021)NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator., , , , , и . ICCD, стр. 173-176. IEEE, (2019)Performance directed energy management for main memory and disks., , , , , , и . ASPLOS, стр. 271-283. ACM, (2004)On the Accuracy of Stochastic Delay Bound for Network on Chip., , , , , и . NOCS, стр. 14:1-14:8. ACM, (2017)A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium Digital Signature., , , , и . ACM Great Lakes Symposium on VLSI, стр. 258-262. ACM, (2024)Reducing Worst Case Reaction Time of Synchronous Programs on Chip-multiprocessors with Application-Specific TDMA Scheduling., , и . JTRES, стр. 11:1-11:9. ACM, (2015)Using Data Mining Techniques to Improve Software Reliability. University of Illinois Urbana-Champaign, USA, (2006)CP-Miner: A Tool for Finding Copy-paste and Related Bugs in Operating System Code., , , и . OSDI, стр. 289-302. USENIX Association, (2004)