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Disambiguation of "Fan, Deliang"

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DA2: Deep Attention Adapter for Memory-EfficientOn-Device Multi-Domain Learning.

, , and . CoRR, (2020)

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Deliang Wang

Deliang Chen

Fan Zhang

Hua Fan

Fan Dai

 

Other publications of authors with the same name

Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (12): 2134-2138 (2017)Spin-Transfer Torque Devices for Logic and Memory: Prospects and Perspectives., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (1): 1-22 (2016)Design and Synthesis of Ultra Low Energy Spin-Memristor Threshold Logic., , and . CoRR, (2014)Spin Neurons: A Possible Path to Energy-Efficient Neuromorphic Computers., , and . CoRR, (2013)CMP-PIM: an energy-efficient comparator-based processing-in-memory neural network accelerator., , , and . DAC, page 105:1-105:6. ACM, (2018)IMC: energy-efficient in-memory convolver for accelerating binarized deep neural network., and . NCS, page 3:1-3:8. ACM, (2017)Leveraging spintronic devices for ultra-low power in-memory computing: Logic and neural network., , and . MWSCAS, page 1109-1112. IEEE, (2017)RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery., , , , and . DATE, page 790-795. IEEE, (2021)Deep-Dup: An Adversarial Weight Duplication Attack Framework to Crush Deep Neural Network in Multi-Tenant FPGA., , , and . USENIX Security Symposium, page 1919-1936. USENIX Association, (2021)FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro., , , , , and . ESSCIRC, page 405-408. IEEE, (2023)