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Disambiguation of "Zhou, Jian-Bin"

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A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding.

, , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 714-724 (2017)

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Bin Zhou

Jian Zhou

Jian-Feng Zhou

Zhou Zhou

Zhou Zhou

 

Other publications of authors with the same name

High Performance VLSI Architecture of H.265/HEVC Intra Prediction for 8K UHDTV Video Decoder., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (12): 2519-2527 (2015)Measurement-domain intra prediction framework for compressively sensed images., , , , and . ISCAS, page 1-4. IEEE, (2017)Approximate-DCT-Derived Measurement Matrices with Row-Operation-Based Measurement Compression and its VLSI Architecture for Compressed Sensing., , , and . IEICE Trans. Electron., 101-C (4): 263-272 (2018)14.7 A 4Gpixel/s 8/10b H.265/HEVC video decoder chip for 8K Ultra HD applications., , , , , , , , , and 1 other author(s). ISSCC, page 266-268. IEEE, (2016)Approximate-DCT-derived measurement matrices for compressed sensing., , , and . ISCAS, page 1-4. IEEE, (2017)Unified Parameter Decoder Architecture for H.265/HEVC Motion Vector and Boundary Strength Decoding., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (7): 1356-1365 (2015)An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 52 (1): 113-126 (2017)Angular Intra Prediction Based Measurement Coding Algorithm for Compressively Sensed Image., , and . ICME Workshops, page 1-6. IEEE Computer Society, (2018)VLSI architecture of HEVC intra prediction for 8K UHDTV applications., , , and . ICIP, page 1273-1277. IEEE, (2014)A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 714-724 (2017)