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A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding.

, , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 714-724 (2017)

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14.7 A 4Gpixel/s 8/10b H.265/HEVC video decoder chip for 8K Ultra HD applications., , , , , , , , , and 1 other author(s). ISSCC, page 266-268. IEEE, (2016)A low power 720p motion estimation processor with 3D stacked memory., , , and . VLSI-SoC, page 1-6. IEEE, (2014)Parallel Implementation of the Range-Doppler Radar Processing on a GPU Architecture., , , , , and . ISPDC, page 76-79. IEEE Computer Society, (2016)Shadow removal via dual module network and low error shadow dataset., , , , , and . Comput. Graph., (2021)A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 714-724 (2017)An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 52 (1): 113-126 (2017)Learning to detect soft shadow from limited data., , , , , and . Vis. Comput., 38 (5): 1665-1675 (2022)Impedance Based MEMS Biosensor for Detection of Foodborne Pathogen., , , , , , , , , and 1 other author(s). NEMS, page 623-626. IEEE, (2018)