Author of the publication

A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding.

, , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 714-724 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Multiple-Reference Compression of RTP/UDP/IP Headers for Mobile Multimedia Communications., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (7): 1491-1500 (2002)Register placement for high-performance circuits., , and . DATE, page 1470-1475. IEEE, (2009)Network simplex method based Multiple Voltage Scheduling in Power-efficient High-level synthesis., , and . ASP-DAC, page 237-242. IEEE, (2013)Double feedback streaming agent for real-time delivery of media over 3G wireless networks., , and . WCNC, page 2102-2106. IEEE, (2003)A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication., , , , and . DAC, page 299-304. ACM, (2004)Who Writes What Checkers? - Learning from Bug Repositories., and . HotDep, USENIX Association, (2014)Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair., , and . ISCAS, page 3403-3406. IEEE, (2007)Power and resource aware scheduling with multiple voltages., , , , and . ASICON, page 1-4. IEEE, (2013)Floorplanning driven Network-on-Chip synthesis for 3-D SoCs., , , , and . ISCAS, page 1203-1206. IEEE, (2011)Mobility overlap-removal based leakage power aware scheduling in high-level synthesis., , , and . ISCAS, page 1745-1748. IEEE, (2013)