( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Clock tree synthesis with data-path sensitivity matching.

, , и . ASP-DAC, стр. 498-503. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Martin Brown

Sebastian Matthias Josef Brown

Klaudia Annemarie Brown

Christian Brownlees

Peter Schuyler Brown

 

Другие публикации лиц с тем же именем

Analog Circuit Design Methodologies to Improve Negative-Bias Temperature Instability Degradation., , и . VLSI Design, стр. 369-374. IEEE Computer Society, (2010)Analysis and Optimization of Enhanced MTCMOS Scheme., , и . VLSI Design, стр. 234-239. IEEE Computer Society, (2004)A Top-Down Microsystems Design Methodology and Associated Challenges ., , , , , и . DATE, стр. 20292-20296. IEEE Computer Society, (2003)Reducing parasitic BJT effects in partially depleted SOI digital logic circuits., , и . Microelectron. J., 39 (2): 275-285 (2008)Top-down and bottom-up approaches to stable clock synthesis., , и . ICECS, стр. 575-578. IEEE, (2003)Clock tree synthesis with data-path sensitivity matching., , и . ASP-DAC, стр. 498-503. IEEE, (2008)A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces., , , , , , , и . ISCAS, стр. 2837-2840. IEEE, (2008)Study and simulation of CMOS LC oscillator phase noise and jitter., , и . ISCAS (1), стр. 665-668. IEEE, (2003)A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference., , , , , , и . DAC, стр. 520-525. ACM, (2003)New digital circuit techniques for total standby leakage reduction in nano-scale SOI technology., , , , и . ESSCIRC, стр. 309-312. IEEE, (2003)