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10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital Predistortion.

F. Tesolin, S. Dartizio, G. Castoro, F. Buccoleri, M. Rossoni, D. Cherniak, C. Samori, A. Lacaita, and S. Levantino. ISSCC, page 198-200. IEEE, (2024)

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Salvatore Loiero

Fundamentalmetanoia: Untersuchungen zu einem Ort eschato-praktischer Erfahrungs- und ErinnerungskulturS. Loiero. Uni Tübingen, habilitation, (2009)

Salvatore Cusenza

Salvatore Saputo

Salvatore Scarlata

Salvatore Grisanti

Other publications of authors with the same name

Suppression of flicker noise upconversion in a 65nm CMOS VCO in the 3.0-to-3.6GHz band.S. Levantino, M. Zanuso, C. Samori, and A. Lacaita. ISSCC, page 50-51. IEEE, (2010)Low-Power Divider Retiming in a 3-4 GHz Fractional-N PLL.D. Tasca, M. Zanuso, S. Levantino, C. Samori, and A. Lacaita. IEEE Trans. Circuits Syst. II Express Briefs, 58-II (4): 200-204 (2011)Time-to-digital converter with 3-ps resolution and digital linearization algorithm.M. Zanuso, S. Levantino, A. Puggelli, C. Samori, and A. Lacaita. ESSCIRC, page 262-265. IEEE, (2010)2.9 A Background calibration technique to control bandwidth in digital PLLs.G. Marzin, S. Levantino, C. Samori, and A. Lacaita. ISSCC, page 54-55. IEEE, (2014)10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and -252.4dB FoM.M. Rossoni, S. Dartizio, F. Tesolin, G. Castoro, R. Dell'Orto, C. Samori, A. Lacaita, and S. Levantino. ISSCC, page 188-190. IEEE, (2024)A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique.A. Garghetti, A. Lacaita, and S. Levantino. ISCAS, page 1-4. IEEE, (2018)Impact of CMOS Scaling on Switched-Capacitor Power Amplifiers.A. Truppi, C. Samori, A. Lacaita, S. Levantino, M. Ronchi, and M. Sosio. ISCAS, page 1-4. IEEE, (2018)A 10.2-ENOB, 150-MS/s Redundant SAR ADC With a Quasi-Monotonic Switching Algorithm for Time-Interleaved Converters.L. Scaletti, G. Bè, A. Parisi, L. Bertulessi, L. Ricci, M. Mercandelli, S. Levantino, C. Samori, and A. Bonfanti. NEWCAS, page 20-24. IEEE, (2022)A 2.9-to-4.0GHz fractional-N digital PLL with bang-bang phase detector and 560fsrms integrated jitter at 4.5mW power.D. Tasca, M. Zanuso, G. Marzin, S. Levantino, C. Samori, and A. Lacaita. ISSCC, page 88-90. IEEE, (2011)Low-power CMOS IEEE 802.11a/g Signal Separator for Outphasing Transmitter.L. Panseri, L. Romanò, S. Levantino, C. Samori, and A. Lacaita. CICC, page 133-136. IEEE, (2006)

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Disambiguation of "Levantino, Salvatore"