( en | de | ru )

 

Disambiguation of "Zorian, Yervant"

Author of the publication

copydeleteadd this publication to your clipboard
Advanced functional safety mechanisms for embedded memories and IPs in automotive SoCs.

, , , , , , and . ITC, page 1-6. IEEE, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Zorian, Yervant
add a person with the name Zorian, Yervant
 

Other publications of authors with the same name

System chip test: how will it impact your design?, and . DAC, page 136-141. ACM, (2000)Panel Session - Vertical integration versus disaggregation.. DATE, page 602. IEEE, (2009)International Test Conference in Asia (ITC-Asia) - Bridging ITC and Test Community in Asia., , , , and . ITC, page 1-4. IEEE, (2019)Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs., , , , and . ITC, page 1-6. IEEE, (2018)Memory FIT Rate Mitigation Technique for Automotive SoCs., , , , , , , and . ITC, page 1-6. IEEE, (2019)Challenges in testing core-based system ICs., and . IEEE Commun. Mag., 37 (6): 104-109 (1999)On-chip Electromigration Sensor for Silicon Lifecycle Management of Nanoscale VLSI., , , , and . ETS, page 1-4. IEEE, (2023)Some Experiments in Test Pattern Generation for FPGA-Implemented Combinational Circuits., , , , and . SBCCI, page 3-8. IEEE Computer Society, (2000)SLM Subsystem for Automotive SoC: Case Study on Path Margin Monitor., , , , and . ITC, page 388-392. IEEE, (2023)Testing Embedded Core-Based System Chips., and . LATW, page 2. IEEE, (2001)