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3D Capacitive Interconnections for High Speed Interchip Communication.

, , , , , , , , и . CICC, стр. 1-8. IEEE, (2007)

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Luciano Ciccarelli

Gregory Ciccarelli

Francesca Donatella Ciccarelli

Luca Rizzini

Luca Tranchini

 

Другие публикации лиц с тем же именем

Low leakage circuit design for FPGAs., , и . CICC, стр. 715-718. IEEE, (2004)A Multi-Context Pipelined Array for Embedded Systems., , , , , и . FPL, стр. 1-8. IEEE, (2006)3D capacitive transmission of analog signals with automatic compensation of the voltage attenuation., , , , , , , и . ESSCIRC, стр. 116-119. IEEE, (2009)Decoder-Based Multi-Context Interconnect Architecture., , , , и . ISVLSI, стр. 231-233. IEEE Computer Society, (2003)3D Capacitive Interconnections for High Speed Interchip Communication., , , , , , , , и . CICC, стр. 1-8. IEEE, (2007)Combining low-leakage techniques for FPGA routing design., , и . FPGA, стр. 208-214. ACM, (2005)A dynamically adaptive DSP for heterogeneous reconfigurable platforms., , , , , , , , и . DATE, стр. 9-14. EDA Consortium, San Jose, CA, USA, (2007)3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities., , , , , , , и . ISSCC, стр. 356-608. IEEE, (2007)Compact Buffered Routing Architecture., , , , , и . FPL, том 3203 из Lecture Notes in Computer Science, стр. 179-188. Springer, (2004)Low leakage design of LUT-based FPGAs., , , , и . ESSCIRC, стр. 153-156. IEEE, (2005)