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Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures., , and . ITC, page 377-382. IEEE, (2023)An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers., , , and . VTS, page 252-259. IEEE Computer Society, (1999)Analysis and Characterization of Ultra Low Power Branch Predictors., , , , and . ICCD, page 144-147. IEEE Computer Society, (2018)Soft Errors: System Effects, Protection Techniques and Case Studies., , , and . DATE, ACM, (2008)Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors., and . DATE, page 578-583. IEEE Computer Society, (2004)Deterministic software-based self-testing of embedded processor cores., , , , and . DATE, page 92-96. IEEE Computer Society, (2001)Effective Software Self-Test Methodology for Processor Cores., , , and . DATE, page 592-597. IEEE Computer Society, (2002)HealthLog Monitor: A Flexible System-Monitoring Linux Service., , and . IOLTS, page 183-188. IEEE, (2018)Cross-Layer Soft-Error Resilience Analysis of Computing Systems., , , , and . DSN (Supplements), page 79. IEEE, (2020)Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs., , , and . IISWC, page 216-220. IEEE, (2023)