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Harnessing voltage margins for energy efficiency in multicore CPUs.

G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, P. Lawthers, and S. Das. MICRO, page 503-516. ACM, (2017)

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Romy Das

Bio-economic modeling of soil resource conservation in Mid Hill Region of NepalR. Das. Uni Gießen, (2009)

Anita Das

Arabindo Das

Amitabh Das

Kamalendu Das

Other publications of authors with the same name

Circuit-aware architectural simulation.S. Lee, S. Das, V. Bertacco, T. Austin, D. Blaauw, and T. Mudge. DAC, page 305-310. ACM, (2004)A Low-Energy Inductive Transceiver using Spike-Latency Encoding for Wireless 3D Integration.B. Fletcher, S. Das, and T. Mak. ISLPED, page 1-6. IEEE, (2019)Run-time Detection and Mitigation of Power-Noise Viruses.V. Tenentes, S. Das, D. Rossi, and B. Al-Hashimi. IOLTS, page 275-280. IEEE, (2019)Design and Optimization of Inductive-Coupling Links for 3-D-ICs.B. Fletcher, S. Das, and T. Mak. IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 711-723 (2019)Session 4 Overview: Processors Digital Architectures and Systems Subcommittee.S. Mathew, S. Das, and H. Mair. ISSCC, page 52-53. IEEE, (2021)Energy-efficient approximate wallace-tree multiplier using significance-driven logic compression.I. Qiqieh, R. Shafik, G. Tarawneh, D. Sokolov, S. Das, and A. Yakovlev. SiPS, page 1-6. IEEE, (2017)Harnessing voltage margins for energy efficiency in multicore CPUs.G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, P. Lawthers, and S. Das. MICRO, page 503-516. ACM, (2017)Razor: A Variability-Tolerant Design Methodology for Low-Power and Robust Computing.S. Das. University of Michigan, USA, (2009)RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance.S. Das, C. Tokunaga, S. Pant, W. Ma, S. Kalaiselvan, K. Lai, D. Bull, and D. Blaauw. IEEE J. Solid State Circuits, 44 (1): 32-48 (2009)DVFS in loop accelerators using BLADES.G. Dasika, S. Das, K. Fan, S. Mahlke, and D. Bull. DAC, page 894-897. ACM, (2008)

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Disambiguation of "Das, Shidhartha"

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Harnessing voltage margins for energy efficiency in multicore CPUs.

Please choose a person to relate this publication to

Romy Das

Anita Das

Arabindo Das

Amitabh Das

Kamalendu Das

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Das, Shidhartha"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Harnessing voltage margins for energy efficiency in multicore CPUs.

Please choose a person to relate this publication to

Romy Das

Anita Das

Arabindo Das

Amitabh Das

Kamalendu Das

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Harnessing voltage margins for energy efficiency in multicore CPUs.