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Disambiguation of "Anderson, Jason Helge"

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Architecture description and packing for logic blocks with hierarchy, modes and complex interconnect.

, , and . FPGA, page 227-236. ACM, (2011)

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Ian Jason

Hans Helge

Alexandra Helgert

Roland Helger

Thomas Helge

 

Other publications of authors with the same name

Clock gating architectures for FPGA power reduction., , and . FPL, page 112-118. IEEE, (2009)Generic Connectivity-Based CGRA Mapping via Integer Linear Programming., and . FCCM, page 65-73. IEEE, (2019)Design re-use for compile time reduction in FPGA high-level synthesis flows., and . FPT, page 4-11. IEEE, (2014)An LPGA with Foldable PLA-style Logic Blocks., and . FPGA, page 244-252. ACM, (1998)LegUp: high-level synthesis for FPGA-based processor/accelerator systems., , , , , , , and . FPGA, page 33-36. ACM, (2011)Optimizing FPGA Logic Block Architectures for Arithmetic., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 28 (6): 1378-1391 (2020)Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code., , , , , and . IEEE Trans. Computers, 71 (4): 933-946 (2022)CGRA Mapping Using Zero-Suppressed Binary Decision Diagrams., and . ASP-DAC, page 616-622. IEEE, (2022)Post-LUT-Mapping Implementation of General Logic on Carry Chains Via a MIG-Based Circuit Representation., and . FPL, page 334-340. IEEE, (2021)Thread Weaving: Static Resource Scheduling for Multithreaded High-Level Synthesis., and . DAC, page 2. ACM, (2019)