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Disambiguation of "Kim, Chulwoo"

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25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty-cycle corrector.

, , , , , , , , , , , , , , , , , , , , , , and . ISSCC, page 434-435. IEEE, (2014)

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Ky ng Kim

Die Artikelstruktur in passiven zweisprachigen Wörterbüchern Deutsch-Koreanisch: Konzeption zur Erstellung eines zweisprachigen Lernerwörterbuchs Deutsch-Koreanisch. Uni Heidelberg, (2008)

Ryong Kim

Yongkyu Kim

Bongcheol Kim

Kim Gerber

 

Other publications of authors with the same name

A 5-Bit 500-MS/S Flash ADC using Time-Domain Comparison., , , , and . Journal of Circuits, Systems, and Computers, (2012)A 7ps-Jitter 0.053mm2 Fast-Lock ADDLL with Wide-Range and High-Resolution All-Digital DCC., , , , , and . ISSCC, page 184-595. IEEE, (2007)An on-chip soft-start technique of current-mode DC-DC converter for biomedical applications., , , and . APCCAS, page 500-503. IEEE, (2010)A 32 Gb/s Rx only equalization transceiver with 1-tap speculative FIR and 2-tap direct IIR DFE., , , and . VLSI Circuits, page 1-2. IEEE, (2016)Low Power Cache with Successive Tag Comparison Algorithm., , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 599-606. Springer, (2003)A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time., , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (10): 1461-1469 (2009)A 2-Gb/s/ch Data-Dependent Swing-Limited On-Chip Signaling for Single-Ended Global I/O in SDRAM., , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (10): 1207-1211 (2017)A 7.5-Gb/s Referenceless Transceiver With Adaptive Equalization and Bandwidth-Shifting Technique for Ultrahigh-Definition Television in a 0.13- µm CMOS Process., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (11): 865-869 (2014)A 1-mW Solar-Energy-Harvesting Circuit Using an Adaptive MPPT With a SAR and a Counter., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (6): 331-335 (2013)A 1-V 10-Gb/s/pin Single-Ended Transceiver With Controllable Active-Inductor-Based Driver and Adaptively Calibrated Cascaded-Equalizer for Post-LPDDR4 Interfaces., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (1): 331-342 (2018)