Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Physical design of supergate cells aiming geometrical optimizations., , , , , and . MWSCAS, page 1-4. IEEE, (2016)Transistor placement strategies for non-series-parallel cells., , , , , and . MWSCAS, page 523-526. IEEE, (2017)A New Technique Using Tunnel Shape Information to Improve Path Search in Detailed Routing., , and . NEWCAS, page 243-247. IEEE, (2018)Toward better layout design in ASTRAN CAD tool by using an efficient transistor folding., , , , and . MWSCAS, page 1-4. IEEE, (2016)An Improved Heuristic Function for A∗-Based Path Search in Detailed Routing., , and . ISCAS, page 1-5. IEEE, (2019)A Fast Approximate Function Generation Method to ATMR Architecture., , , and . LASCAS, page 1-4. IEEE, (2022)Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization., , , , , , , , , and 31 other author(s). DATE, page 1026-1031. IEEE, (2021)Calibration of Logical Effort Transistor Sizing for On-the-Fly Low-Power Supergate Design., , , , and . LASCAS, page 1-4. IEEE, (2022)Methods for Susceptibility Analysis of Logic Gates in the Presence of Single Event Transients., , and . ITC, page 1-9. IEEE, (2020)An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults., , , and . VLSI-SoC (Selected Papers), volume 586 of IFIP Advances in Information and Communication Technology, page 69-88. Springer, (2019)