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Disambiguation of "da Rosa, Leomar S."

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A New Technique Using Tunnel Shape Information to Improve Path Search in Detailed Routing.

, , and . NEWCAS, page 243-247. IEEE, (2018)

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Catarina Caetano da Rosa

Da Liu

Da Wang

Da He

Da Li

 

Other publications of authors with the same name

Transistor placement strategies for non-series-parallel cells., , , , , and . MWSCAS, page 523-526. IEEE, (2017)Physical design of supergate cells aiming geometrical optimizations., , , , , and . MWSCAS, page 1-4. IEEE, (2016)A New Technique Using Tunnel Shape Information to Improve Path Search in Detailed Routing., , and . NEWCAS, page 243-247. IEEE, (2018)An Improved Heuristic Function for A∗-Based Path Search in Detailed Routing., , and . ISCAS, page 1-5. IEEE, (2019)Toward better layout design in ASTRAN CAD tool by using an efficient transistor folding., , , , and . MWSCAS, page 1-4. IEEE, (2016)A Fast Approximate Function Generation Method to ATMR Architecture., , , and . LASCAS, page 1-4. IEEE, (2022)Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization., , , , , , , , , and 31 other author(s). DATE, page 1026-1031. IEEE, (2021)Calibration of Logical Effort Transistor Sizing for On-the-Fly Low-Power Supergate Design., , , , and . LASCAS, page 1-4. IEEE, (2022)Methods for Susceptibility Analysis of Logic Gates in the Presence of Single Event Transients., , and . ITC, page 1-9. IEEE, (2020)Reliability evaluation of circuits designed in multi- and single-stage versions., , , , , , and . LASCAS, page 1-4. IEEE, (2018)