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Disambiguation of "Chen, Zhanping"

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A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology.

, , , , , , , , , and . IEEE J. Solid State Circuits, 44 (1): 148-154 (2009)

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Zhanping Xu

Zhanping Cheng

Zhanping Xu

Chen Chen

Chen Chen

 

Other publications of authors with the same name

Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits., , , , and . DAC, page 489-494. ACM Press, (1998)SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction., , , , , , , , and . IEEE J. Solid State Circuits, 40 (4): 895-901 (2005)Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process., , , , , and . VLSIC, page 174-. IEEE, (2015)IDDQ Testing for Deep Submicron ICs: Challenges and Solutions., , , and . LATW, page 186-192. IEEE, (2002)A Power Macromodeling Technique Based on Power Sensitivity., and . DAC, page 678-683. ACM Press, (1998)On effective IDDQ testing of low-voltage CMOS circuits using leakage control techniques., , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (5): 718-725 (2001)A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology., , , , , , , , , and . IEEE J. Solid State Circuits, 44 (1): 148-154 (2009)Power sensitivity - a new method to estimate power dissipation considering uncertain specifications of primary inputs., , and . ICCAD, page 40-44. IEEE Computer Society / ACM, (1997)Vertically integrated SOI circuits for low-power and high-performance applications., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (3): 351-362 (2002)Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications., , and . ISCAS (1), page 366-370. IEEE, (1999)