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Disambiguation of "Kumaki, Takeshi"

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A scalable massively parallel processor for real-time image processing.

, , , , , , , , , , , , and . ISSCC, page 334-335. IEEE, (2010)

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Takeshi Morita

Takeshi Imamura

Takeshi Morita

Takeshi Omori

Takeshi Yasui

 

Other publications of authors with the same name

Cipher-destroying and secret-key-emitting hardware Trojan against AES core., , and . MWSCAS, page 408-411. IEEE, (2013)Development of effective information-hiding method for embedded systems., , , , and . MWSCAS, page 1298-1301. IEEE, (2013)Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (8): 1312-1315 (2007)Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (1): 334-345 (2007)CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table image coding example., , , , , , , and . ISCAS (5), page 5202-5205. IEEE, (2005)Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine., , , , , , , and . ISCAS, page 525-528. IEEE, (2007)A scalable massively parallel processor for real-time image processing., , , , , , , , , and 3 other author(s). ISSCC, page 334-335. IEEE, (2010)Evaluation of advanced pixel-level snakes on cellular hardware platform., , , , , and . NEWCAS, page 1-4. IEEE, (2013)Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory., , , , and . IEICE Trans. Inf. Syst., 90-D (1): 346-354 (2007)Design and LSI prototyping of security module with hardware trojan., , and . ICCE, page 426-427. IEEE, (2015)