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Design and Applications for Embedded Networks-on-Chip on FPGAs., , and . IEEE Trans. Computers, 66 (6): 1008-1021 (2017)Don't Forget the Memory: Automatic Block RAM Modelling, Optimization, and Architecture Exploration., , and . FPGA, page 115-124. ACM, (2017)Optimizing FPGA Logic Block Architectures for Arithmetic., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 28 (6): 1378-1391 (2020)Math Doesn't Have to be Hard: Logic Block Architectures to Enhance Low-Precision Multiply-Accumulate on FPGAs., , , and . FPGA, page 94-103. ACM, (2019)Becoming More Tolerant: Designing FPGAs for Variable Supply Voltage., , and . FPL, page 1-8. IEEE, (2019)Improving Confidentiality in Virtualized FPGAs., and . FPT, page 258-261. IEEE, (2018)Effect of the prefabricated routing track distribution on FPGA area-efficiency., and . IEEE Trans. Very Large Scale Integr. Syst., 6 (3): 445-456 (1998)From Quartus to VPR: Converting HDL to BLIF with the Titan flow., , , , and . FPL, page 1. IEEE, (2013)Design and simulation tools for Embedded NOCs on FPGAs., , , and . FPL, page 1. IEEE, (2015)Should FPGAS abandon the pass-gate?, and . FPL, page 1-8. IEEE, (2013)