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Disambiguation of "Badel, Stéphane"

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VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications.

, , and . ESANN, page 445-450. (2003)

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Stéphane Klein

Stéphane Haussler

Stéphane Müller

Stéphane Clinchant

Stéphane Aubry

 

Other publications of authors with the same name

Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture., , and . ISCAS (5), page 780-783. IEEE, (2004)Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design., , , and . ISCAS, IEEE, (2006)Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells., , , and . VLSI-SoC, page 234-238. IEEE, (2006)A Generic Standard Cell Design Methodology for Differential Circuit Styles., , , , , , and . DATE, page 843-848. ACM, (2008)Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage., and . ISCAS, page 1871-1874. IEEE, (2007)Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library., , , , , and . DAC, page 1014-1019. ACM, (2011)VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications., , and . ESANN, page 445-450. (2003)Optimization of Wire Grid Size for Differential Routing and Impact on the Power-delay-area Tradeoff., , and . ISCAS, page 1285-1288. IEEE, (2009)Predictable system interconnects through accurate early wire characterization., , , and . SoCC, page 287-290. IEEE, (2007)Early wire characterization for predictable network-on-chip global interconnects., , , , , , and . SLIP, page 57-64. ACM, (2007)