( en | de | ru )

 

Disambiguation of "Jose, Babita R."

Author of the publication

copydeleteadd this publication to your clipboard
Efficient Hardware Acceleration of Convolutional Neural Networks.

, , , and . SoCC, page 191-192. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

José Romero R

Jose Alberto Vélez R

Wilhelm Josenhans

Klaus Josefiak

Peter Josephs

 

Other publications of authors with the same name

A triple-mode feed-forward sigma-delta modulator design for GSM / WCDMA / WLAN applications., , , and . SoCC, page 309-312. IEEE, (2007)A Differentially Quantized Bandpass Error Feedback Modulator for ADCs in Digital Radio., , , and . CSSP, 37 (10): 4181-4199 (2018)Design Space Exploration of Convolution Algorithms to Accelerate CNNs on FPGA., , , and . ISED, page 21-25. IEEE, (2018)Compressed sense sigma delta modulators for bio-medical image acquisition., and . ISED, page 299-302. IEEE, (2016)Spectrum Prediction in Cognitive Radio Networks: A Bayesian Approach., , and . NGMAST, page 203-208. IEEE, (2014)Dual-mode RNS based programmable decimation filter for WCDMA and WLANa., , , , and . ISCAS, page 952-955. IEEE, (2008)An antenna selection scheme with MRE and AWC for decision fusion in cognitive radio., , and . Trans. Emerg. Telecommun. Technol., (2017)A Novel Excess Sturdy-MASH-Loop-Delay Compensated Cross-Coupled Sigma-Delta Modulator., , and . VLSID, page 246-251. IEEE Computer Society, (2016)A Hardware Accelerator for Convolutional Neural Network Using Fast Fourier Transform., , , and . VDAT, volume 892 of Communications in Computer and Information Science, page 28-36. Springer, (2018)UniWiG: Unified Winograd-GEMM Architecture for Accelerating CNN on FPGAs., , , and . VLSID, page 209-214. IEEE, (2019)