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A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS., , , , and . ESSCIRC, page 376-379. IEEE, (2007)Low-cost feedback-enabled LNAs in 45nm CMOS., , , , and . ESSCIRC, page 100-103. IEEE, (2009)A 2-mm2 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 44 (12): 3486-3498 (2009)SAW-less software-defined radio transceivers in 40nm CMOS., , and . CICC, page 1-8. IEEE, (2011)A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS., , , , and . ISSCC, page 184-185. IEEE, (2008)A 5mm2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver., , , , , , , , , and 1 other author(s). ISSCC, page 458-459. IEEE, (2010)A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS., , , , and . ISSCC, page 324-325. IEEE, (2008)A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration., , , and . ESSCIRC, page 275-278. IEEE, (2011)A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS., , , , and . ISSCC, page 536-537. IEEE, (2008)Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies., , , , , , , , , and 5 other author(s). ISSCC, page 528-529. IEEE, (2008)