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Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures., , , , and . J. Electr. Comput. Eng., (2016)An integrated hardware/software design methodology for signal processing systems., , , , , , , , , and 1 other author(s). J. Syst. Archit., (2019)Power modelling for saving strategies in coarse grained reconfigurable systems., , , , and . ReConFig, page 1-4. IEEE, (2015)Feasibility Study of Real-Time Spiking Neural Network Simulations on a Swarm Intelligence Based Digital Architecture., , , , and . IPDPS Workshops, page 247-250. IEEE Computer Society, (2017)A coarse-grained reconfigurable wavelet denoiser exploiting the Multi-Dataflow Composer tool., , , , and . DASIP, page 141-148. IEEE, (2013)A Composable Monitoring System for Heterogeneous Embedded Platforms., , , , , and . ACM Trans. Embed. Comput. Syst., 20 (5): 42:1-42:34 (2021)Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach., , , , , , , , , and 5 other author(s). SAMOS, volume 11733 of Lecture Notes in Computer Science, page 416-428. Springer, (2019)Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems., , , , , , and . ReConFig, page 1-8. IEEE, (2018)Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project., , , , , , , , , and 10 other author(s). DSD, page 378-385. IEEE, (2020)Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case., , , , , and . ICSAMOS, page 59-66. IEEE, (2014)