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A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping scheme and a half-bit delay line., , , , , и . ESSCIRC, стр. 447-450. IEEE, (2014)Convolutional-Neural-Network-Based Partial Discharge Diagnosis for Power Transformer Using UHF Sensor., , , , и . IEEE Access, (2020)A new micro biological cell injection system., и . IROS, стр. 1642-1647. IEEE, (2004)A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop., , , , и . A-SSCC, стр. 73-76. IEEE, (2018)13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ Calibration., , , , , , , , , и 25 other автор(ы). ISSCC, стр. 242-244. IEEE, (2024)A theoretical analysis of phase shift in pulse injection-locked oscillators., , , , , и . ISCAS, стр. 1662-1665. IEEE, (2016)7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers., , , , , , , , , и 20 other автор(ы). ISSCC, стр. 130-131. IEEE, (2016)Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH., , , , , , , , , и . VLSIC, стр. 136-137. IEEE, (2012)A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS., , , , и . A-SSCC, стр. 1-4. IEEE, (2015)256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers., , , , , , , , , и 19 other автор(ы). IEEE J. Solid State Circuits, 52 (1): 210-217 (2017)