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Predicting Shot-Level SRAM Read/Write Margin Based on Measured Transistor Characteristics.

S. Bin, S. Lin, Y. Cheng, W. Liau, A. Hou, and M. Chao. IEEE Trans. Very Large Scale Integr. Syst., 24 (2): 625-637 (2016)

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Hanna Huey-Jiun Chao

Hsi-Lin Chao

Kuo-Yih Chao

Zouheir Chaoui

Rabih Chaoui

Other publications of authors with the same name

Generating Routing-Driven Power Distribution Networks With Machine-Learning Technique.W. Chang, C. Lin, S. Mu, L. Chen, C. Tsai, Y. Chiu, and M. Chao. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (8): 1237-1250 (2017)Test Generation for Defect-Based Faults of Scan Flip-Flops.Y. Nien, C. Li, P. Wu, Y. Wang, K. Wu, and M. Chao. VTS, page 1-7. IEEE, (2023)Predicting Vt variation and static IR drop of ring oscillators using model-fitting techniques.T. Huang, W. Hung, H. Yang, W. Chang, Y. Chen, C. Kuo, J. Lee, and M. Chao. ASP-DAC, page 426-431. IEEE, (2017)Methodology of generating dual-cell-aware tests.Y. Huang, C. Lu, T. Wu, Y. Nien, Y. Chen, M. Wu, J. Lee, and M. Chao. VTS, page 1-6. IEEE Computer Society, (2017)Test Methodology for Defect-based Bridge Faults.Y. Hu, S. Chang, K. Wu, C. Wang, F. Huang, Y. Tang, Y. Chen, M. Chen, and M. Chao. ITC-Asia, page 106-111. IEEE, (2020)Statistical methodology to identify optimal placement of on-chip process monitors for predicting fmax.S. Mu, W. Chang, M. Chao, Y. Wang, M. Chang, and M. Tsai. ICCAD, page 116. ACM, (2016)Path-Based Pre-Routing Timing Prediction for Modern Very Large-Scale Integration Designs.L. Chen, Y. Sui, T. Lee, Y. Li, M. Chao, I. Tsai, T. Kung, E. Liu, and Y. Chang. ISQED, page 1-6. IEEE, (2022)Rule Generation for Classifying SLT Failed Parts.H. Hsu, C. Lu, S. Wang, K. Jones, K. Wu, and M. Chao. VTS, page 1-7. IEEE, (2022)Predicting Vt mean and variance from parallel Id measurement with model-fitting technique.C. Tsai, K. Lee, C. Lin, S. Yu, W. Liau, A. Hou, Y. Chen, C. Kuo, J. Lee, and M. Chao. VTS, page 1-6. IEEE Computer Society, (2016)Improving Cell-Aware Test for Intra-Cell Short Defects.D. Lee, Y. Chen, K. Wu, and M. Chao. DATE, page 436-441. IEEE, (2022)

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Disambiguation of "Chao, Mango C.-T."

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Predicting Shot-Level SRAM Read/Write Margin Based on Measured Transistor Characteristics.

Please choose a person to relate this publication to

Hanna Huey-Jiun Chao

Hsi-Lin Chao

Kuo-Yih Chao

Zouheir Chaoui

Rabih Chaoui

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chao, Mango C.-T."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Predicting Shot-Level SRAM Read/Write Margin Based on Measured Transistor Characteristics.

Please choose a person to relate this publication to

Hanna Huey-Jiun Chao

Hsi-Lin Chao

Kuo-Yih Chao

Zouheir Chaoui

Rabih Chaoui

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Predicting Shot-Level SRAM Read/Write Margin Based on Measured Transistor Characteristics.