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Disambiguation of "Schmatz, Martin L."

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5.75 to 44Gb/s quarter rate CDR with data rate selection in 90nm bulk CMOS.

, , , , , , and . ESSCIRC, page 166-169. IEEE, (2008)

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Werner Schmatz

Werner Schmatz

Angela Schmatz

Stefan Schmatz

Rüdiger Schmatz

 

Other publications of authors with the same name

A low-power 20-GHz 52-dBΩ transimpedance amplifier in 80-nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 39 (6): 885-894 (2004)When Virtual Meets Physical at the Edge: A Field Study on Datacenters' Virtual Traffic., , , , and . SIGMETRICS, page 403-415. ACM, (2015)5.75 to 44Gb/s quarter rate CDR with data rate selection in 90nm bulk CMOS., , , , , , and . ESSCIRC, page 166-169. IEEE, (2008)BiCMOS Variable Gain LNA at C-Band with Ultra Low Power Consumption for WLAN., , , , , , and . ICT, volume 3124 of Lecture Notes in Computer Science, page 891-899. Springer, (2004)Profiling Memory Vulnerability of Big-Data Applications., , , , , , , and . DSN Workshops, page 258-261. IEEE Computer Society, (2016)Designing (Not Only) Lunar Space Data Centers., , , , , , , , , and 2 other author(s). IGARSS, page 6104-6108. IEEE, (2024)A 4.5mW/Gb/s 6.4Gb/s 22+1-lane source-synchronous link rx core with optional cleanup PLL in 65nm CMOS., , , , , , and . ISSCC, page 160-161. IEEE, (2010)A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm2 in 32 nm SOI CMOS., , , , , , , , , and 1 other author(s). A-SSCC, page 89-92. IEEE, (2014)A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS., , , , , , , , , and . ISSCC, page 468-469. IEEE, (2013)A 100-mW 4×10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects., , , , , , , , and . IEEE J. Solid State Circuits, 40 (12): 2667-2679 (2005)