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Disambiguation of "Wang, Naigang"

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Novel IC Sub-Threshold IDDQ Signature And Its Relationship To Aging During High Voltage Stress.

, , and . ESSDERC, page 250-253. IEEE, (2018)

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Wang Wang

Linfang Wang

Investigation of the functions of 53BP1 in DNA demethylation. Uni Marburg, (2009)

Hanchun Wang

Chuanchao Wang

Qingwei Wang

 

Other publications of authors with the same name

A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling., , , , , , , , , and 34 other author(s). ISSCC, page 144-146. IEEE, (2021)Hybrid 8-bit Floating Point (HFP8) Training and Inference for Deep Neural Networks., , , , , , , , and . NeurIPS, page 4901-4910. (2019)A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm2., , , , , , , , , and 5 other author(s). ISSCC, page 400-402. IEEE, (2012)DLFloat: A 16-b Floating Point Format Designed for Deep Learning Training and Inference., , , , , , and . ARITH, page 92-95. IEEE, (2019)Improved Techniques for Quantizing Deep Networks with Adaptive Bit-Widths., , , , , , , and . WACV, page 946-956. IEEE, (2024)ScaleCom: Scalable Sparsified Gradient Compression for Communication-Efficient Distributed Training., , , , , , , , , and 1 other author(s). NeurIPS, (2020)RaPiD: AI Accelerator for Ultra-low Precision Training and Inference., , , , , , , , , and 44 other author(s). ISCA, page 153-166. IEEE, (2021)A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference., , , , , , , , , and 33 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)Innovate Practices on CyberSecurity of Hardware Semiconductor Devices., , , , , , , , , and 4 other author(s). VTS, page 1. IEEE, (2019)4-Bit Quantization of LSTM-Based Speech Recognition Models., , , , , , , , , and 2 other author(s). Interspeech, page 2586-2590. ISCA, (2021)