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Disambiguation of "Serb, Alexander"

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Design Flow for Hybrid CMOS/Memristor Systems - Part II: Circuit Schematics and Layout.

, , , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (12): 4876-4888 (2021)

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Jürgen Serbitzer

Iwan Serbesoff

Susanne Serba

Rares Serban

Ali Serbetci

 

Other publications of authors with the same name

Towards a memristor-based spike-sorting platform., , , and . BioCAS, page 408-411. IEEE, (2016)A Memristor-based Tuneable Offset Comparator., , , and . NEWCAS, page 1-5. IEEE, (2023)A compact Verilog-A ReRAM switching model., , , , and . CoRR, (2017)A RRAM-Based Associative Memory Cell., , , and . ISCAS, page 1-5. IEEE, (2021)A tool for emulating neuromorphic architectures with memristive models and devices., , , and . ISCAS, page 1092-1096. IEEE, (2022)A Digital In-Analogue Out Logic Gate Based on Metal-Oxide Memristor Devices., , , , , and . ISCAS, page 1-5. IEEE, (2019)A memristor-CMOS hybrid architecture concept for on-line template matching., , and . ISCAS, page 1-4. IEEE, (2017)Design Flow for Hybrid CMOS/Memristor Systems - Part II: Circuit Schematics and Layout., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 68 (12): 4876-4888 (2021)A Neural Recording System with 16 Reconfigurable Front-end Channels and Memristive Processing/Memory Unit., , , , , , , and . NEWCAS, page 1-5. IEEE, (2023)An Integrated CMOS/Memristor Bio-Processor for Re-configurable Neural Signal Processing., , , , and . BioCAS, page 1-5. IEEE, (2023)