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Disambiguation of "Johann, Marcelo O."

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An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias.

, , , and . VLSI-SoC, page 128-133. IEEE, (2006)

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Marcelo Trallero

Marcelo Giovannetti

Marcelo Klötzle

Marcelo Ephraim

Marcelo Bertasso

 

Other publications of authors with the same name

Posicionamento de Circuitos 3D Considerando o Planejamento de 3D-Vias., , and . RITA, 19 (1): 28-45 (2012)Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff., , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (8): 1073-1086 (2009)Drive Strength Aware Cell Movement Techniques for Timing Driven Placement., , , , and . ISPD, page 73-80. ACM, (2016)The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms., , , and . ICCD, page 195-202. IEEE Computer Society, (2010)Net by Net Routing with a New Path Search Algorithm., and . SBCCI, page 144-149. IEEE Computer Society, (2000)Maze routing steiner trees with effective critical sink optimization., , , and . ISPD, page 135-142. ACM, (2007)Fast and efficient lagrangian relaxation-based discrete gate sizing., , , and . DATE, page 1855-1860. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Quadratic timing objectives for incremental timing-driven placement optimization., , , , and . ICECS, page 620-623. IEEE, (2016)A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits., , , and . ICECS, page 852-855. IEEE, (2009)An analytical timing-driven algorithm for detailed placement., , , and . LASCAS, page 1-4. IEEE, (2015)