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Hardware-oriented stereo vision algorithm based on 1-D guided filtering and its FPGA implementation., , , , , , , , , и 1 other автор(ы). ICECS, стр. 169-172. IEEE, (2013)An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration., , , , и . FCCM, стр. 264-266. IEEE Computer Society, (1998)Foreword., и . VLSI Circuits, стр. 1-2. IEEE, (2016)Decision Forest Training Accelerator Based on Binary Feature Decomposition., , , , , , и . FCCM, стр. 215. IEEE, (2023)Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet., , , , , , , , и . ISSCC, стр. 1-3. IEEE, (2022)F3: Beyond the horizon of conventional computing: From deep learning to neuromorphic systems., , , , , и . ISSCC, стр. 506-508. IEEE, (2017)Edge Inference Engine for Deep & Random Sparse Neural Networks with 4-bit Cartesian-Product MAC Array and Pipelined Activation Aligner., , , , , , и . HCS, стр. 1-21. IEEE, (2021)A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations., , , , , , и . MCSoC, стр. 478-485. IEEE, (2023)Motion-vector estimation and cognitive classification on an image sensor/processor 3D stacked system featuring ThruChip interfaces., , , , , , и . ESSCIRC, стр. 105-108. IEEE, (2016)Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor., , , , , , , , , и 3 other автор(ы). FCCM, стр. 328-329. IEEE Computer Society, (2004)