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Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips., , , , , , , и . CoRR, (2016)Improving Multi-Application Concurrency Support Within the GPU Memory System., , , , , , , и . CoRR, (2017)Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM., , , , , и . HPCA, стр. 568-580. IEEE Computer Society, (2016)Utility-Based Hybrid Memory Management., , , , , и . CLUSTER, стр. 152-165. IEEE Computer Society, (2017)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases., , , , и . ISVLSI, стр. 273-278. IEEE, (2022)Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud., , , , и . CoRR, (2022)FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching., , , , , , , , , и 1 other автор(ы). MICRO, стр. 313-328. IEEE, (2020)Carpool: a bufferless on-chip network supporting adaptive multicast and hotspot alleviation., , , , , и . ICS, стр. 19:1-19:11. ACM, (2017)Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks., , , , , , , , , и 1 other автор(ы). ASPLOS, стр. 316-331. ACM, (2018)SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM., , , , , , , , , и . CoRR, (2021)