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Disambiguation of "Verkest, Diederik"

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Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.

, , , and . DATE, page 1224-1229. IEEE Computer Society, (2004)

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Diederik Noordveld

Johan Diederik Neethling

 

Other publications of authors with the same name

A Description Methodology for Parameterized Modules in the Boyer-Moore Logic., , , and . TPCD, volume A-10 of IFIP Transactions, page 37-57. North-Holland, (1992)A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU., , and . Designing Correct Circuits, volume A-5 of IFIP Transactions, page 173-192. North-Holland, (1992)Dimensioning for power and performance under 10nm: The limits of FinFETs scaling., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Modeling FinFET metal gate stack resistance for 14nm node and beyond., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Operating system based software generation for systems-on-chip., , and . DAC, page 396-401. ACM, (2000)Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model., , , and . Euro-Par, volume 3149 of Lecture Notes in Computer Science, page 206-213. Springer, (2004)A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors., , , , , , and . ARCS, volume 4415 of Lecture Notes in Computer Science, page 57-68. Springer, (2007)Operating-system controlled network on chip., , , , and . DAC, page 256-259. ACM, (2004)A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm2 in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration., , , , , , , and . CICC, page 1-2. IEEE, (2021)Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing., , , , , and . NEWCAS, page 1-4. IEEE, (2021)