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Automatic IP Core Generator for FPGA-Based Q-Learning Hardware Accelerators.

, , , , , and . ApplePies, volume 1036 of Lecture Notes in Electrical Engineering, page 242-247. Springer, (2022)

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IP Generator Tool for Efficient Hardware Acceleration of Self-organizing Maps., , , , and . ApplePies, page 493-499. Springer, (2018)IP based reconfigurable digital platform for satellite communications., , and . ISCAS (2), page 37-40. IEEE, (2003)A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters., , and . DATE, page 686-687. IEEE Computer Society, (2004)Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders., , , , , , and . IOLTS, page 194-196. IEEE Computer Society, (2007)System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology., , , , , and . DFT, page 455-460. IEEE Computer Society, (2001)Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams., , , , , , , and . DFT, page 111-114. IEEE Computer Society, (2016)Compressive sensing spectrum analysis for space autonomous radio receivers., , , and . ACSSC, page 492-494. IEEE, (2013)Power efficient design of parallel/serial FIR filters in RNS., , , , and . ACSCC, page 1015-1019. IEEE, (2012)A Wireless Sensor Node Based on Microbial Fuel Cell., , , , and . ApplePies, volume 409 of Lecture Notes in Electrical Engineering, page 143-150. Springer, (2015)FPGA realization of RNS to binary signed conversion architecture., , , and . ISCAS (4), page 350-353. IEEE, (2001)