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A formal approach to fault tree synthesis for the analysis of distributed fault tolerant systems.

, , , , and . EMSOFT, page 237-246. ACM, (2005)

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Verification of Electronic Systems., , and . DAC, page 106-111. ACM Press, (1996)Use of Sensitivities and Generalized Substrate Models in Mixed-Signal IC Design., , , , and . DAC, page 227-232. ACM Press, (1996)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , and . DAC, page 254-260. ACM Press, (1995)On Thermal Effects in Deep Sub-Micron VLSI Interconnects., , , and . DAC, page 885-891. ACM Press, (1999)Solving the State Assignment Problem for Signal Transition Graphs., , , and . DAC, page 568-572. IEEE Computer Society Press, (1992)Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation., , and . DAC, page 173-176. IEEE Computer Society Press, (1992)Logic Synthesis for Programmable Gate Arrays., , , , and . DAC, page 620-625. IEEE Computer Society Press, (1990)An Improved Synthesis Algorithm for Multiplexor-Based PGA's., , and . DAC, page 380-386. IEEE Computer Society Press, (1992)DA Algorithms in Non-EDA Applications: How Universal Are Our Techniques? (Panel)., , , , , and . DAC, page 503. ACM Press, (1994)A Fully Implicit Algorithm for Exact State Minimization., , , and . DAC, page 684-690. ACM Press, (1994)