( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Towards approximation during test of Integrated Circuits.

, , , , , и . DDECS, стр. 28-33. IEEE, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Arnaud Mende

Arnaud Moris

Julien Arnaud

Arnaud Dewalque

Arnaud Casteigts

 

Другие публикации лиц с тем же именем

Intra-Cell Defects Diagnosis., , , , , , и . J. Electron. Test., 30 (5): 541-555 (2014)On hardware generation of random single input change test sequences., , , , и . ETW, стр. 117-123. IEEE Computer Society, (2001)Random Adjacent Sequences: An Efficient Solution for Logic BIST., , , , и . VLSI-SOC, том 218 из IFIP Conference Proceedings, стр. 413-424. Kluwer, (2001)Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles., , , , и . VLSI-SoC, том 240 из IFIP, стр. 267-281. Springer, (2005)A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction., , , , , , и . J. Electron. Test., 24 (4): 353-364 (2008)An efficient hybrid power modeling approach for accurate gate-level power estimation., , , , и . ICM, стр. 17-20. IEEE, (2015)A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing., , , , , и . ETS, стр. 1-4. IEEE, (2022)Approximate computing: Design & test for integrated circuits., , , и . LATS, стр. 1. IEEE, (2017)Parity prediction synthesis for nano-electronic gate designs., , , , , , и . ITC, стр. 820. IEEE Computer Society, (2010)Low-power SRAMs power mode control logic: Failure analysis and test solutions., , , , , , и . ITC, стр. 1-10. IEEE Computer Society, (2012)