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A Data-Driven Verilog-A ReRAM Model., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3151-3162 (2018)Hybrid CMOS/Memristor Circuit Design Methodology., , , , , , , , and . CoRR, (2020)An Absorbing Markov Chain Model for Stochastic Memristive Devices., , and . MOCAST, page 1-4. IEEE, (2022)Live Demonstration: An Embedded Environmental Control Micro-chamber System for RRAM Memristor Characterisation., , , , , , and . ISCAS, page 1-. IEEE, (2018)Live demonstration: A TiO2 ReRAM parameter extraction method., , , , , , and . ISCAS, page 1. IEEE, (2017)A Reconfigurable CMOS-Memristor Active Inductor., , , and . ISCAS, page 1-5. IEEE, (2020)Metal Oxide-enabled Reconfigurable Memristive Threshold Logic Gates., , , , , and . ISCAS, page 1-5. IEEE, (2018)Live Demonstration: Benchmarking Analogue Performance of Emerging Random Access Memory Technologies., , , and . ISCAS, page 1-. IEEE, (2018)Tone Stimulus Detection For Rats Using RRAM-Based Local Field Potential Monitoring., , , , , , , and . BioCAS, page 1-5. IEEE, (2023)A CMOS-based Characterisation Platform for Emerging RRAM Technologies., , , , , , , , , and 4 other author(s). ISCAS, page 75-79. IEEE, (2022)