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SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.

J. Faraone, N. Fraser, M. Blott, and P. Leong. CVPR, page 4300-4309. Computer Vision Foundation / IEEE Computer Society, (2018)

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Irene Blottner

Steffen Blottner

Annemarie Blottner

Stefan Blöttner

Gerhard Blottner

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DarwiNN: efficient distributed neuroevolution under communication constraints.G. Malik, L. Petrica, N. Kapre, and M. Blott. GECCO Companion, page 141-142. ACM, (2020)Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs.Y. Yang, Q. Huang, B. Wu, T. Zhang, L. Ma, G. Gambardella, M. Blott, L. Lavagno, K. Vissers, J. Wawrzynek and 1 other author(s). CoRR, (2018)LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications.Y. Umuroglu, Y. Akhauri, N. Fraser, and M. Blott. FPL, page 291-297. IEEE, (2020)ACCL+: an FPGA-Based Collective Engine for Distributed Applications.Z. He, D. Korolija, Y. Zhu, B. Ramhorst, T. Laan, L. Petrica, M. Blott, and G. Alonso. OSDI, page 211-231. USENIX Association, (2024)Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems.P. McKechnie, M. Blott, and W. Vanderbauwhede. FCCM, page 175-182. IEEE Computer Society, (2009)Corrigendum: Applications and techniques for fast machine learning in science.A. Deiana, N. Tran, J. Agar, M. Blott, G. Guglielmo, J. Duarte, P. Harris, S. Hauck, M. Liu, M. Neubauer and 37 other author(s). Frontiers Big Data, (2024)Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring.P. McKechnie, M. Blott, and W. Vanderbauwhede. LCTES, page 129-136. ACM, (2009)QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware.M. Blott, L. Halder, M. Leeser, and L. Doyle. ACM J. Emerg. Technol. Comput. Syst., 15 (4): 37:1-37:38 (2019)Applications and Techniques for Fast Machine Learning in Science.A. Deiana, N. Tran, J. Agar, M. Blott, G. Guglielmo, J. Duarte, P. Harris, S. Hauck, M. Liu, M. Neubauer and 37 other author(s). Frontiers Big Data, (2022)Dataflow architectures for 10Gbps line-rate key-value-stores.M. Blott, and K. Vissers. Hot Chips Symposium, page 1-25. IEEE, (2013)

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Disambiguation of "Blott, Michaela"

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SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.

Please choose a person to relate this publication to

Irene Blottner

Steffen Blottner

Annemarie Blottner

Stefan Blöttner

Gerhard Blottner

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Blott, Michaela"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.

Please choose a person to relate this publication to

Irene Blottner

Steffen Blottner

Annemarie Blottner

Stefan Blöttner

Gerhard Blottner

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
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SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.