Author of the publication

A new orthogonal online digital calibration for time-interleaved analog-to-digital converters.

, , , , and . ISCAS, page 576-579. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

High-level synthesis for the design of FPGA-based signal processing systems., and . ICSAMOS, page 25-32. IEEE, (2009)Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems., , and . SiPS, page 280-285. IEEE, (2006)Multicore implementation of LDPC decoders based on ADMM algorithm., , , , and . ICASSP, page 971-975. IEEE, (2016)Low-latency software LDPC decoders for x86 multi-core devices., and . SiPS, page 1-6. IEEE, (2017)Software polar decoder on an embedded processor., , and . SiPS, page 180-185. IEEE, (2014)High data rate and flexible hardware QC-LDPC decoder for satellite optical communications., , , and . ISTC, page 1-5. IEEE, (2018)FPGA technology and parallel computing towards automatic microarray image processing., , , and . TSP, page 607-610. IEEE, (2011)Hardware Virtual Components Compliant with Communication System Standards., , , , , , , and . DSD, page 88-95. IEEE Computer Society, (2005)An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes., , , , and . LCPC, volume 9519 of Lecture Notes in Computer Science, page 303-317. Springer, (2015)High-Performance Gallager-E Decoders for Hard Input LDPC Decoding on Multi-core Devices., , and . DASIP, volume 13425 of Lecture Notes in Computer Science, page 3-15. Springer, (2022)