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Disambiguation of "Tu, Fengbin"

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AutoDCIM: An Automated Digital CIM Compiler.

, , , , , , and . DAC, page 1-6. IEEE, (2023)

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Shiwei Tu

Nguyen Tu

Changfeng Tu

Wei Tu

Chunling Tu

 

Other publications of authors with the same name

MoNA: Mobile Neural Architecture with Reconfigurable Parallel Dimensions., , , , and . NEWCAS, page 1-4. IEEE, (2019)A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications., , , , , , , , , and . IEEE J. Solid State Circuits, 53 (4): 968-982 (2018)RNA: a reconfigurable architecture for hardware neural acceleration., , , , and . DATE, page 695-700. ACM, (2015)STC: Significance-aware Transform-based Codec Framework for External Memory Access Reduction., , , , , , and . DAC, page 1-6. IEEE, (2020)Towards Efficient Compact Network Training on Edge-Devices., , , and . ISVLSI, page 61-67. IEEE, (2019)ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration., , , , , , , , , and . IEEE J. Solid State Circuits, 58 (1): 243-255 (2023)SDP: Co-Designing Algorithm, Dataflow, and Architecture for In-SRAM Sparse NN Acceleration., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (1): 109-121 (2023)ADROIT: An Adaptive Dynamic Refresh Optimization Framework for DRAM Energy Saving In DNN Training., , , , , , and . DAC, page 751-756. IEEE, (2021)INSPIRE: in-storage private information retrieval via protocol and architecture co-design., , , , , , , , and . ISCA, page 102-115. ACM, (2022)Towards Efficient Control Flow Handling in Spatial Architecture via Architecting the Control Flow Plane., , , , , , , , , and 2 other author(s). MICRO, page 1395-1408. ACM, (2023)