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RNA: a reconfigurable architecture for hardware neural acceleration.

, , , , and . DATE, page 695-700. ACM, (2015)

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Aggressive Pipelining of Irregular Applications on Reconfigurable Hardware., , , , , and . ISCA, page 575-586. ACM, (2017)A 2.69 Mbps/mW 1.09 Mbps/kGE Conjugate Gradient-based MMSE Detector for 64-QAM 128×8 Massive MIMO Systems., , , , , and . A-SSCC, page 191-194. IEEE, (2018)Memory fartitioning-based modulo scheduling for high-level synthesis., , , , , and . ISCAS, page 1-4. IEEE, (2017)AEPE: An area and power efficient RRAM crossbar-based accelerator for deep CNNs., , , , , , , , , and . NVMSA, page 1-6. IEEE, (2017)Energy-aware loops mapping on multi-vdd CGRAs without performance degradation., , , and . ASP-DAC, page 312-317. IEEE, (2017)Efficient Hardware Architecture of Softmax Layer in Deep Neural Network., , , and . DSP, page 1-5. IEEE, (2018)A Reconfigurable Branch Predictor for Spatial Computing Architectures., , , , and . ICDSP, page 295-299. ACM, (2020)GraphABCD: Scaling Out Graph Analytics with Asynchronous Block Coordinate Descent., , , , , , and . ISCA, page 419-432. IEEE, (2020)Mixed-granularity parallel coarse-grained reconfigurable architecture., , , , , , , , , and 2 other author(s). DAC, page 343-348. ACM, (2022)MC-CIM: a reconfigurable computation-in-memory for efficient stereo matching cost computation., , , , and . DAC, page 457-462. ACM, (2022)