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Disambiguation of "Papanikolaou, Antonis"

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Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design.

, , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 119-141. Springer, (2006)

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Georgios Papanikolaou

Paschalis Papanikolaou

Apostolos Papanikolaou

Amalia Papanikolaou

Antonis Tsiongas

 

Other publications of authors with the same name

CAD tools for designing 3D integrated systems., , and . ISCAS, page 2229-2232. IEEE, (2011)A tool flow for predicting system level timing failures due to interconnect reliability degradation., , , , , and . ACM Great Lakes Symposium on VLSI, page 291-296. ACM, (2008)Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture., , , , , and . ARC, volume 3985 of Lecture Notes in Computer Science, page 52-58. Springer, (2006)A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement., , , and . ASP-DAC, page 759-761. IEEE Computer Society, (2004)Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios., , , , and . SiPS, page 305-310. IEEE, (2011)3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot., , , , , , , , and . Proc. IEEE, 97 (1): 96-107 (2009)Interconnect exploration for future wire dominated technologies., , , , , , , and . SLIP, page 105-106. ACM, (2002)Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design., , , , , , , , and . VLSI-SoC, page 342-347. IEEE, (2006)Physical design implementation of segmented buses to reduce communication energy., , , and . ASP-DAC, page 42-47. IEEE, (2006)Accelerating All-to-All Protein Structures Comparison with TMalign Using a NoC Many-Cores Processor Architecture., , and . IPDPS Workshops, page 510-519. IEEE, (2013)