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A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification on RFSoC Platform.

, , , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (7): 3318-3322 (July 2024)

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20.3 A feedforward controlled on-chip switched-capacitor voltage regulator delivering 10W in 32nm SOI CMOS., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver., , , , , , , , , and 3 other author(s). ISCAS, page 1-5. IEEE, (2018)A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET., , , , , , , , , and 6 other author(s). A-SSCC, page 239-240. IEEE, (2019)DDR4 transmitter with AC-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS technology., , , , , , , , , and 1 other author(s). ESSCIRC, page 115-118. IEEE, (2017)22.1 A 90GS/s 8b 667mW 64× interleaved SAR ADC in 32nm digital SOI CMOS., , , , , , , , , and . ISSCC, page 378-379. IEEE, (2014)Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFET., , , , , , , , , and 2 other author(s). ESSCIRC, page 183-186. IEEE, (2017)Encoder logic for reducing serial I/O power in sensors and sensor hubs., , and . Hot Chips Symposium, page 1-2. IEEE, (2016)A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET., , , , , , , , , and 5 other author(s). ISSCC, page 476-478. IEEE, (2019)A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification on RFSoC Platform., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. II Express Briefs, 71 (7): 3318-3322 (July 2024)A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links., , , , , , , , , and 14 other author(s). VLSI Technology and Circuits, page 28-29. IEEE, (2022)