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A Dedicated TLP Set-Up to Investigate the ESD Robustness of RF Elements and Circuits., , , и . Microelectron. Reliab., 45 (9-11): 1421-1424 (2005)A 10GHz Broadband Amplifier with Bootstrapped 2kV ESD Protection., , , , , и . ISSCC, стр. 550-551. IEEE, (2007)Electronic design automation (EDA) solutions for ESD-robust design and verification., , , , и . CICC, стр. 1-8. IEEE, (2012)High-Voltage-Tolerant I/O Circuit Design for USB 2.0-Compliant Applications., , , и . CICC, стр. 491-494. IEEE, (2007)ESD protection for the deep sub micron regime - a challenge for design methodology.. VLSI Design, стр. 809-. IEEE Computer Society, (2004)Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability., , , и . IRPS, стр. 3. IEEE, (2018)Physics of Current Filamentation in ggNMOS Revisited: Was Our Understanding Scientifically Complete?, , , , и . VLSID, стр. 391-394. IEEE Computer Society, (2017)Circuit design issues in multi-gate FET CMOS technologies., , , , , , , , , и 5 other автор(ы). ISSCC, стр. 1656-1665. IEEE, (2006)