Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability.

M. Paul, B. Kumar, H. Gossner, and M. Shrivastava. IRPS, page 3. IEEE, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Mayank Tiwari

Mayank Kabra

Ashish Shrivastava

Mayank Agnihotri

Magan Bihari Shrivastava

Other publications of authors with the same name

Threshold Voltage Shift in a-Si: H Thin film Transistors under ESD stress Conditions.R. Sinha, P. Bhattacharya, S. Sambandan, and M. Shrivastava. IRPS, page 1-6. IEEE, (2020)Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD Stress.M. Monishmurali, N. Kranthi, G. Boselli, and M. Shrivastava. IRPS, page 1-5. IEEE, (2023)Unveiling Field Driven Performance Unreliabilities Governed by Channel Dynamics in MoSe2 FETs.U. Patbhaje, R. Verma, J. Kumar, Ansh, and M. Shrivastava. IRPS, page 1-6. IEEE, (2023)Effect of Source & Drain Side Abutting on the Low Current Filamentation in LDMOS-SCR Devices.M. Monishmurali, N. Kranthi, G. Boselli, and M. Shrivastava. IRPS, page 6. IEEE, (2022)Are Argon and Nitrogen Gases Really Inert to Graphene Devices?J. Kumar, and M. Shrivastava. DRC, page 1-2. IEEE, (2022)Physics of Current Filamentation in ggNMOS Revisited: Was Our Understanding Scientifically Complete?M. Paul, C. Russ, B. Kumar, H. Gossner, and M. Shrivastava. VLSID, page 391-394. IEEE Computer Society, (2017)Physical Insights into Phosphorene Transistor Degradation Under Exposure to Atmospheric Conditions and Electrical Stress.J. Kumar, Ansh, A. Yadav, A. Singh, A. Naclerio, D. Zakharov, P. Kidambi, and M. Shrivastava. IRPS, page 1-4. IEEE, (2020)Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability.M. Paul, B. Kumar, H. Gossner, and M. Shrivastava. IRPS, page 3. IEEE, (2018)Experimental Insights into the Role of Inter-valley and Defect Transitions of Hot Electrons in Determining Self-heating in AlGaN/GaN HEMTs.R. Chaudhuri, V. Joshi, S. Wani, S. Karthik, R. Malik, and M. Shrivastava. IRPS, page 1-6. IEEE, (2024)Towards predictable and risk-free enterprise systems.M. Shrivastava, M. Natu, and V. Sadaphal. DSAA, page 1-7. IEEE, (2015)